{"id":59785,"date":"2025-12-04T01:11:12","date_gmt":"2025-12-04T01:11:12","guid":{"rendered":"https:\/\/www.threatshub.org\/blog\/rust-core-library-partly-polished-for-industrial-safety-spec\/"},"modified":"2025-12-04T01:11:12","modified_gmt":"2025-12-04T01:11:12","slug":"rust-core-library-partly-polished-for-industrial-safety-spec","status":"publish","type":"post","link":"https:\/\/www.threatshub.org\/blog\/rust-core-library-partly-polished-for-industrial-safety-spec\/","title":{"rendered":"Rust core library partly polished for industrial safety spec"},"content":{"rendered":"<p>Memory-safe Rust code can now be more broadly applied in devices that require electronic system safety, at least as measured by International Electrotechnical Commission (IEC) standards.<\/p>\n<p>The latest update to <a href=\"https:\/\/ferrocene.dev\/en\" rel=\"nofollow\">Ferrocene<\/a>, an open source Rust compiler toolchain for safety-and mission-critical systems, comes with IEC 61508 (SIL 2) certification for portions of the core library.<\/p>\n<p>&#8220;Rust is impractical to run in embedded or safety-critical environments without core, and core can&#8217;t be certified without rigorous validation using toolchains like Ferrocene,&#8221; said Florian Gilcher, managing director at Ferrous Systems, in a <a href=\"https:\/\/ferrous-systems.com\/blog\/ferrocene-libcore-news-release\/\" rel=\"nofollow\">blog post<\/a>. &#8220;This release reaffirms our commitment to providing modern Rust compilers \u2013 and now certified libraries \u2013 to meet the needs of the safety-critical world.&#8221;<\/p>\n<div aria-hidden=\"true\" class=\"adun\" data-pos=\"top\" data-raptor=\"condor\" data-xsm=\",fluid,mpu,dmpu,\" data-sm=\",fluid,mpu,dmpu,\" data-md=\",fluid,mpu,dmpu,\"> <noscript> <a href=\"https:\/\/pubads.g.doubleclick.net\/gampad\/jump?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=2&amp;c=2aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0\" target=\"_blank\"> <img decoding=\"async\" src=\"https:\/\/pubads.g.doubleclick.net\/gampad\/ad?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=2&amp;c=2aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0\" alt> <\/a> <\/noscript> <\/div>\n<p>Stamping out memory safety bugs has become a priority for those concerned with <a href=\"https:\/\/www.theregister.com\/2025\/06\/27\/cisa_nsa_call_formemory_safe_languages\/\">the security of public and private sector systems<\/a>. But developing for embedded systems still largely involves the use of C or C++ code, which face <a href=\"https:\/\/www.theregister.com\/2025\/09\/16\/safe_c_proposal_ditched\/\">memory safety<\/a> <a href=\"https:\/\/www.theregister.com\/2025\/03\/02\/c_creator_calls_for_action\/\">challenges<\/a> \u2013 an issue that a new C\/C++ compiler called <a href=\"https:\/\/www.theregister.com\/2025\/11\/05\/djb_tries_filc_and_approves\/\">Fil-C may address<\/a>.<\/p>\n<div aria-hidden=\"true\" class=\"adun\" data-pos=\"top\" data-raptor=\"falcon\" data-xmd=\",fluid,mpu,leaderboard,\" data-lg=\",fluid,mpu,leaderboard,\" data-xlg=\",fluid,billboard,superleaderboard,mpu,leaderboard,\" data-xxlg=\",fluid,billboard,superleaderboard,brandwidth,brandimpact,leaderboard,mpu,\"> <noscript> <a href=\"https:\/\/pubads.g.doubleclick.net\/gampad\/jump?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=4&amp;c=44aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0\" target=\"_blank\"> <img decoding=\"async\" src=\"https:\/\/pubads.g.doubleclick.net\/gampad\/ad?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=4&amp;c=44aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D426raptor%3Dfalcon%26pos%3Dmid%26test%3D0\" alt> <\/a> <\/noscript> <\/div>\n<div class=\"adun_eagle_desktop_story_wrapper\">\n<div aria-hidden=\"true\" class=\"adun\" data-pos=\"mid\" data-raptor=\"eagle\" data-xxlg=\",mpu,dmpu,\"> <noscript> <a href=\"https:\/\/pubads.g.doubleclick.net\/gampad\/jump?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=3&amp;c=33aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0\" target=\"_blank\"> <img decoding=\"async\" src=\"https:\/\/pubads.g.doubleclick.net\/gampad\/ad?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=3&amp;c=33aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0\" alt> <\/a> <\/noscript> <\/div>\n<\/p><\/div>\n<p>The certification of a portion of the Rust core library has the potential to bring more Rust code to regulated industries. The programming language&#8217;s strong memory safety guarantees should help reduce memory-related errors and improve the stability of associated applications, assuming <a target=\"_blank\" href=\"https:\/\/www.theregister.com\/2025\/11\/13\/ubuntu_rust_sudo_hole\/\">new bugs aren&#8217;t introduced<\/a> along the way.<\/p>\n<p>SIL represents <a href=\"https:\/\/www.ektos.net\/articles\/safety-integrity-levels-sil-what-they-are-and-how-to-calculate-them\/\" rel=\"nofollow\">Safety Integrity Level<\/a>, a measure of system safety performance. It summarizes the probability of failure on demand, where SIL 4 represents the most dependable and SIL 1 represents the least.<\/p>\n<p>The SIL 4 designation is appropriate for systems that require maximum reliability because failures have the potential for mass casualties \u2013 think nuclear reactor controls or railway systems. SIL 3 tends to be applied to systems that pose a high risk during failure, such as chemical engineering kit, medical devices, or <a href=\"https:\/\/www.n2ors.com\/oxygen-sensors-n2-ors-sil-3\/\" rel=\"nofollow\">oxygen sensors<\/a>. SIL 2 might be applied to industrial robots. And SIL 1 would work for CCTV cameras or building lighting.<\/p>\n<p>Certification firm <a href=\"https:\/\/www.tuvsud.com\/en-us\" rel=\"nofollow\">T\u00dcV S\u00dcD<\/a> has already blessed the Ferrocene toolchain for safety-focused development based on ISO 26262 (ASIL D), IEC 61508 (SIL 3), and IEC 62304 (Class C). The outfit also supports qualification efforts to reach assurance levels SIL 4 and DO-178C (DAL C).<\/p>\n<div aria-hidden=\"true\" class=\"adun\" data-pos=\"top\" data-raptor=\"falcon\" data-xsm=\",fluid,mpu,dmpu,\" data-sm=\",fluid,mpu,dmpu,\" data-md=\",fluid,mpu,dmpu,\"> <noscript> <a href=\"https:\/\/pubads.g.doubleclick.net\/gampad\/jump?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=4&amp;c=44aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0\" target=\"_blank\"> <img decoding=\"async\" src=\"https:\/\/pubads.g.doubleclick.net\/gampad\/ad?co=1&amp;iu=\/6978\/reg_software\/front&amp;sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&amp;tile=4&amp;c=44aTEKTUVj8bFU2-AqvCtuwAAAABU&amp;t=ct%3Dns%26unitnum%3D426raptor%3Dfalcon%26pos%3Dmid%26test%3D0\" alt> <\/a> <\/noscript> <\/div>\n<p>With the help of partners <a href=\"https:\/\/www.sonair.com\/\" rel=\"nofollow\">Sonair<\/a> and <a href=\"https:\/\/mobilarisindustrialsolutions.se\/news\/introducing-kite-shield-enabling-safe-and-effective-coexistence-of-automated-and-manned-machines\/\" rel=\"nofollow\">Kiteshield<\/a>, Ferrocene devs have certified a substantial subset of the core <a href=\"https:\/\/public-docs.ferrocene.dev\/main\/core\/index.html\" rel=\"nofollow\">library<\/a> so that it meets the IEC 61508 (SIL 2) standard.<\/p>\n<p>The Ferrocene-certified core subset provides developers with access to types and functions such as: Option, Clone, str, pointers, and most primitives, such as slices. It&#8217;s intended to be used for qualified development targets like x86_64 Linux, x86_64 or Armv8-A QNX Neutrino, or RTOS on Armv8-A or Armv7E-M.<\/p>\n<p>Sonair is using Ferrocene for acoustic detection and ranging (ADAR) in robots sporting Armv8-A and an Armv7E-M subsystem. Kiteshield is developing a Rust-based Ultra-Wideband safety system for mining that&#8217;s designed to prevent collisions between manually operated and autonomous machinery. \u00ae<\/p>\n<p> READ MORE <a href=\"https:\/\/go.theregister.com\/feed\/www.theregister.com\/2025\/12\/04\/rust_core_library_partly_polished\/\">HERE<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Ferrous Systems achieves IEC 61508 (SIL 2) certification for systems that demand reliability Memory-safe Rust code can now be more broadly applied in devices that require electronic system safety, at least as measured by International Electrotechnical Commission (IEC) standards.\u2026 READ MORE HERE&#8230;<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"colormag_page_layout":"default_layout","footnotes":""},"categories":[63],"tags":[],"class_list":["post-59785","post","type-post","status-publish","format-standard","hentry","category-the-register"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.8 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Rust core library partly polished for industrial safety spec 2026 | ThreatsHub Cybersecurity News<\/title>\n<meta name=\"description\" content=\"ThreatsHub Cybersecurity News | ThreatsHub.org | Cloud Security &amp; Cyber Threats Analysis Hub. 100% Free OSINT Threat Intelligent and Cybersecurity News.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" 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